NAND Primitive

Table 1.


Output Description:

Input Description:


OUT = logical NAND of inputs

IN1, IN2, ...IN12= 2, 3, 4, 6, 8, or 12 inputs

Note: In Verilog HDL, you must use the built-in nand gate primitive to implement the NAND logic function. Go to Using a Verilog HDL Gate Primitive for more information.