Preserve PLL Counter Order logic option

Preserves the order of PLL clock outputs used when selecting corresponding output counters. For example, a clk0 output uses a C0 counter and a clk2 output uses a C2 counter. Turning on this option can cause clock routing problems, as the clock router cannot rotate counters to resolve conflicts.

This option is useful during PLL-dynamic reconfiguration because it allows you to keep the same counters during different compilations. Using different counters may affect the reconfiguration control logic implementation. Also, this option allows you to use specific counters with specific clock outputs.

This option must be assigned to a node or it is ignored.

Scripting Information

Keyword: preserve_pll_counter_order

Settings: on* | off