GXB 0 PPM core clock setting logic option

A logic option that specifies two gigabit transceiver block (GXB) Definition core clocks that have a zero (0) parts per million (PPM) frequency difference between input clocks. The core clock driver for the assignment source GXB must have a difference of 0 PPM compared with the core clock of the assignment destination GXB. You must connect the specified clock driver to all specified destinations in the GXB 0 PPM clock group. Do not reconfigure the GXB 0 PPM clock group driver differently from other clocks in the GXB 0 PPM clock group and do not bring down the GXB 0 PPM clock group driver source when the destination GXB receiver or transmitter is listening to the signal. Follow the Intel High Speed I/O Applications Technical Support recommendations.

This option is available for supported device (Arria® II, Cyclone® IV GX, and Stratix® IV GT) families.

Scripting Information

Keyword: gxb_0ppm_core_clock

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