Unused Inputs to Primitives, Megafunctions & Macrofunctions
The following rules apply to unconnected input ports on primitive, Intel® FPGA IP, and macrofunction symbols and instances.
- Unused inputs to flipflop primitives have the following
defaults:
CLRN: VCC (inactive) PRN: VCC (inactive) ENA: VCC (active) The data and clock inputs to flipflops and the data and ENA inputs to latches are required. 
- An unused OE input to a TRI buffer defaults to VCC (active, output enabled).
- Unused inputs to logic primitives in Block Editor files must be connected to VCC or GND.
- The default logic levels for unused inputs to Intel® FPGA IP, if any, are documented in the Help for each Intel® FPGA IP. There may not be a default input to some ports on Intel® FPGA IP, and failure to connect such ports will cause the Compiler to issue error messages.