CDC-50102: Synchronizer after CDC Topology with Control Signal
Description
Violations of this rule identify a synchronizer that was identified from the destination of a CDC topology managed by a control signal, such as a clock enable or MUX select signal. Such transfers may not require being followed by a synchronizer, as they are already synchronized by the control signal.
Recommendation
To prevent synchronizers from being formed after such a bus, apply an instance assignment of Synchronization Register Chain Length = 1 on the synchronization nodes.
Severity
Low
Tags
| Tag | Description |
|---|---|
| synchronizer | Design rule checks related to synchronizer chains. |
| false-positive-synchronizer | Design rule checks related to automatically-deteected synchronizer chains that may have been over-zealously detected. |
Device Family
- Intel®Cyclone® 10 GX
- Intel®Arria® 10
- Intel®Stratix® 10
- Intel®Agilex™