LNT-30021: Same Signal Source Drives More Than One Asynchronous Port of a Register


To avoid race conditions in your design, avoid using the same signal source to drive more than one asynchronous port on a register. The following ports are affected:

  • aload
  • adata
  • preset
  • clear
Figure 1. Multiple Synchronous Ports Driven By the Same Signal


Restructure the netlist to avoid the same signal driving multiple asynchronous ports of a register.




Tag Description
nonstandard-timing Design rule checks related to topologies which have unique timing analysis methodologies and may prove problematic.

Device Family

  • Intel®Arria® 10
  • Intel®Cyclone® 10 GX