CLK-30001: Gated Clock Should Feed a Predefined Number of Clock Ports for Power Efficiency


To effectively reduce power consumption using gated clocks, a design should not contain a gated clock that drives fewer than the predefined number of clock ports based on the parameter "clock_pin_threshold".


Name Description Type Default Value Min Value Max Value
clock_pin_threshold Clock Pin Threshold integer 10   1
clock_spines_data Clock Spines Threshold integer 25   1


Ensure that all gated clocks in the design drive at least the predefined number of clock ports. The following example shows a gated clock that feeds more than the predefined number of clock ports:

Figure 1. Gated Clock Feeding More Than The Predefined Number Of Clock Ports




Tag Description
system Design rule checks which validate full-system design.

Device Family

  • Intel®Arria® 10
  • Intel®Cyclone® 10 GX