ID:13027 Removed fan-outs from the following always-disabled I/O buffers

CAUSE: The design contains one or more tri-state buffers that have their output-enable input tied to GND. These tri-state buffers will never provide any useful data to the pins/nodes they feed.As a result, the Quartus Prime software has removed this fan-in. For example, the following Verilog design gives this warning for the tri-state node triwire:

		module test1 (input data1, oe1, data2, inout bidir1); 
		wire triwire, gnd; 
		assign gnd = 1'b0; 
		assign triwire = oe1 ? data1 : 1'bz; 
		assign triwire = gnd ? data2 : 1'bz; 
		assign bidir1 = triwire; 
		endmodule 
	
               

See the sub-messages below for a list of the affected nodes.