ID:176569 Can't place <name> PLL "<name>" in PLL location <name> because its input clock "<name>" has a frequency higher than PLL I/O pin <name> can support

CAUSE: You assigned the specified fast PLL or enhanced PLL, which has a specified input clock with a high frequency, to the specified PLL location, but that location is incompatible with the specified PLL I/O pin, which cannot support an input clock with a high frequency. As a result, the Fitter cannot place the PLL in the specified PLL location.

ACTION: Delete or change the location assignment for the PLL.