ID:170113 Can't satisfy hard routing constraints for signal "<name>". Remove the "hard" routing specification, remove the constraints for the specified signal, or for DDIO or DQS logic, remove the location constraints that force other logic into the same LAB. The Intel FPGA Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.

CAUSE: The Fitter cannot satisfy the routing constraints for the specified signal. Because the routing constraints were marked as "hard", the Fitter is forced to abandon routing. Hard routing constraints can be Fitter-generated for special parts of the design, such as DDIO or DQS logic.

ACTION: If you marked the constraints as "hard", either remove the "hard" specification or change the constraints. If you did not do manually create hard routing constraints, remove all of your constraints associated with the net in question. User-set constraints may conflict with Fitter-generated constraints for special logic, such as DDIO or DQS logic. If the violated hard routing constraints are for DDIO or DQS logic and there are no location constraints for that logic, try removing location constraints that would force any other logic into the same LAB as the DDIO or DQS logic. If the Fitter placed a carry chain into the same LAB, force the carry chain to go into another LAB with location constraints. Visit the Knowledge Database and search for this specific error message number.