SGR-30022: Same Signal Source Drives Clock Port and Another Port of a Register

Description

This rule is a sub-rule of Rule CLK-30002 . It reports a violation only when your design contains clock signal sources that connect to ports other than the clock ports of the same register.

Recommendation

Ensure that a clock signal source only drives input clock ports of registers. The same signal source should not drive the clock port and any other port of a register.

Severity

High

Device Family

  • Intel® Arria® 10
  • Intel® Cyclone® 10 GX