Auto Global Register Control Signals logic option

Allows the Compiler to choose signals that feed the most control signal inputs to registers (excluding clock signals) as global signals made available throughout the device on the global routing paths. Depending on the device family, these control signals can include asynchronous clear, synchronous clear, asynchronous load, synchronous load, preset, clock enable, and output enable signals.

This option must be assigned to a design entity or it is ignored. To prevent the Compiler from automatically selecting a particular signal as a global register control signal, set the Global Signal logic option to Off for that signal.