Section Nine—Concurrent Statements

Section

Construct

VHDL 1987 Support

VHDL 1993 Support

9.1

Block Statement

Supported

Supported

9.2

Process Statement

Supported

Supported

9.2.1 (1987)

Drivers

Supported

Supported. (Reassigned to section 12.6.1 in IEEE Std 1076-1993.)

9.3

Concurrent Procedure Call Statements

Not supported

Not supported

9.4

Concurrent Assertion Statement

Supported. The Intel® Quartus® Prime software executes concurrent assertions whose expressions evaluate to a constant false during elaboration.

Supported. The Intel® Quartus® Prime software executes concurrent assertions whose expressions evaluate to a constant false during elaboration.

9.5

Concurrent Signal Assignment Statements

Supported

Supported

9.5.1

Conditional Signal Assignment

Supported

Supported

9.5.2

Selected Signal Assignment

Supported

Supported

9.6

Component Instantiation Statement

Supported

Supported

9.6.1

Instantiation of a Component

Supported

Supported

9.6.2 (1993)

Instantiation of a Design Entity

n/a

supported

9.7

Generate Statement

Supported

Supported