DLATCH Primitive

Note: When the CLRN input is low, the latch is reset to low. When the PRN input is low, the latch is reset to high. If neither CLRN nor PRN is low, the latch output depends on the value of the ENA (latch-enable) input. If the ENA input is high, the latch passes a signal from the D input to the Q output, else the state of Q is maintained, regardless of the D input.

Note: For information about Intel^® Quartus^® Prime primitive instantiation, go to Using a Intel^® Quartus^® Prime Logic Function.