TMC-20604: Registers with High Timing Path Endpoint Span


This rule identifies registers with high timing path endpoint span scores. This rule analyzes the final placement to identify registers with sinks that are pulling the register in various directions. The Compiler recommends these registers as candidates for duplication.

  • There are two types of sink: "immediate fan-out" and "timing path endpoint."
  • There are two types of pull: "tension" and "span."

Timing path endpoints are the nodes (usually registers) that terminate timing paths from a register. The Timing path endpoint is equivalent to the nodes that the get_fanouts command returns, or the overall set of nodes that appear as a "From Node" after running the report_timing commands. Register duplication is necessary, but not always sufficient, in helping to distribute the signal more efficiently. In addition, you may need to duplicate or restructure any intermediate logic before duplicating the register.

Figure 1. Timing Path Endpoint

Span is the maximum one dimensional delta between the left/bottom-most sink, and the right/top-most sink. The span value is therefore independent of the number of sinks, and it is good at detecting registers that drive a long distance in opposite directions. Register duplication can allow duplicates to travel in each direction to more efficiently disperse the signal.

Figure 2. High Span


Restructure the fan-out cone of the high endpoint-span driver registers or duplicate the driver registers. Better localization of the fan-out paths may require logic duplication or additional pipelining. If the driver registers have >1 immediate fan-out, duplicating those registers either in the RTL, or with the DUPLICATE_REGISTER or DUPLICATE_HIERARCHY_DEPTH assignments, can improve results.




Place, Finalize

Device Family

  • Intel® Agilex™
  • Intel® Stratix® 10
  • Intel® Arria® 10