NSS-30017: Register Output Driving Its Own Control Signal Directly or Through Combinational Logic


Combinational loops can cause significant stability and reliability problems in a design. For example, because the behavior of a combinational loop often depends on the relative propagation delays of the combinational loop's logic, and because design tools experience difficulties when handling combinational loops, the combinational loop after fitting may not function as it was originally intended to function in the design.


A design should not contain any combinational loops where the output of a register:
  • Directly drives one of its own control signals (for example, the register's preset signal or asynchronous load signal).
    Figure 1. Combinational Loop Example

  • Drives combinational logic that drives one of the register's control signals.
    Figure 2. Drives Combinational Logic




Analysis and Elaboration

Device Family

  • Intel® Arria® 10
  • Intel® Cyclone® 10 GX