FLP-40005: Congested Routing Region


High routing utilization, localized to a certain region, may lead to long routing detours having adverse impact on timing of critical nets in the region.

This condition is usually caused by one or more of the following sub-optimal floorplanning decisions:

  • Smaller routing Logic Lock region for the associated logic partition or partial reconfiguration (PR) partitions.
  • Incorrect placement of routing Logic Lock region.
  • Sub-optimal shape of routing Logic Lock region.


Name Default Value Description
Region_Routing_Threshold 70%

Reports a violation for routing regions that have routing congestion higher than the value specified in this parameter.


Review whether the routing Logic Lock region is large enough to contain the associated logic, or if it must be moved or reshaped to follow connectivity of the interface logic.




  • Finalize (analysis mode only)

Device Family

  • Intel® Stratix® 10
  • Intel® Agilex™
  • Intel® Arria® 10
  • Intel® Cyclone® 10 GX