ID:176071 Can't merge fast PLL <name> and fast PLL <name> -- merged fast PLL would drive <number> DPA channels and exceed the maximum number of DPA channels allowed to be driven by a PLL per bank, which is <number>. Design can have up to two fast PLLs that exceed this value (by using center PLL locations and driving in both the top and bottom banks), and two such fast PLLs already exist.

CAUSE: The Fitter tried to merge the specified fast PLLs. The Fitter cannot place the merged fast PLL because the merged fast PLL would drive more DPA channels than the maximum number of DPA channels allowed to be driven by a PLL per bank. The device has only two PLL locations (one center PLL location for each side) which can be used to drive more channels than this limit. However, the design already has two fast PLLs that exceed the limit. This message is a submessage of the message that precedes it in the Messages window and in the Messages section of the Report window.

ACTION: Modify the design so that the number of DPA channels driven by each specified fast PLL is fewer than the maximum number of DPA channels allowed to be driven by a PLL per bank, which will allow the Fitter to utilize corner PLLs on the device. If corner PLLs do not exist on the device, choose a device that has corner PLLs.