ID:16656 Could not find solution for <number> of <number> core registers(s) constrained <text>. Placement and routing for these <number> connection(s) were not committed -- please relax the constraint.

CAUSE: You specified one or some of the following periphery-core transfer optimization constraints: Max Delay for Periphery Core Transfer, Min Delay for Periphery Core Transfer assignments, Max Wires for Periphery Core Transfer, Min Wires for Periphery Core Transfer assignments, however, the constraint you set is too hard to meet.

ACTION: Relax or remove one of the assignments. You must set these options in the Quartus Prime Settings File (.qsf).