ID:308051 (Critical) <text>. Found <number> structure(s) related to this rule.
CAUSE: In the current design, the Design Assistant found the specified number of structures that generate multiple pulses in the following way:
- Each structure contains a two-input AND, NAND, OR, or NOR gate.
- The AND or OR gate output drives one of the gate's own inputs through an inverted delay chain (one or more consecutive nodes that act as a buffer for creating intentional delay). or The NAND or NOR gate output drives one of the gate's own inputs through a delay chain.
- A triggering signal drives the gate's other input.
ACTION: Remove any structures that generate multiple pulses from the design.