ID:14326 One or more don't care state values in FSM "<name>" are being recorded for formal verification as '0' instead of 'X'.

CAUSE: The don't care state value 'X' cannot be stored and processed by Quartus Prime for purpose of formal verification. This can lead to non-equivalence during formal verification.

ACTION: Modify state machine description in design files to eliminate use of 'X' values. For further assistance, contact Intel Technical Support by creating a Service Request at www.altera.com/mysupport.