ID:127006 Memory depth (<number>) in the design file differs from memory depth (<number>) in the Memory Initialization File "<name>" -- setting initial value for remaining addresses to 1

CAUSE: The memory depth value you specified in a design file (Block Design File (.bdf), Text Design File (.tdf), VHDL Design File(.vhd), Verilog Design File (.v), or EDIF Input File (.edf)) in a design does not match the memory depth value you specified in the Memory Initialization File (.mif). This condition occurs when you specify a memory depth in the design file that is greater than the memory depth defined in the Memory Initialization File or the Hexadecimal (Intel-Format) File (.hex) . The Quartus Prime software is therefore setting the initial value for the remaining addresses to 1.

ACTION: If you do not want the initial value for the remaining addresses set to 1, make sure the design file and the Memory Initialization File contain the same memory depth values for the memory block.