ID:13802 VHDL error at <location>: all elements of record type object cannot be accessed with suffix .all

CAUSE: In a VHDL Design File (.vhd) at the specified location, you attempted to access all the elements in a record type object using the format <record type object name> .all. However, you cannot use the suffix .all with a record type object. For example, in the Signal Assignment Statement in the following code, you cannot use exa.all and exb.all to access all the elements in signals exa and exb because both signals have a record type.

TYPE example IS
   RECORD
      ex1 : INTEGER range 1 to 5;
      ex2 : INTEGER range 1 to 6;
      ex3 : INTEGER range 1 to 7;
   END example;
SIGNAL exa : example;
SIGNAL exb : example;
 
               
exa.all <= exb.all;

ACTION: Remove the .all suffix from the record type object name. You can also replace a record type object with an aggregate that specifies all the elements in the object. In the previous example, you can use either of the following Signal Assignment Statements:

exa <= (ex1 => exb.ex1, ex2 => exb.ex2, ex3 => exb.ex3);
exa <= exb;