ID:13790 VHDL error at <location>: slice of object cannot be specified for object that has an array type of more than one dimension

CAUSE: In a VHDL Design File (.vhd) at the specified location, you specified a slice of an object that has an array type with two or more dimensions. For example, the following code contains a slice of the signal mem_inst, which has a two-dimensional array type:

ARCHITECTURE ex1 OF example IS
    TYPE mem_cell IS ARRAY (0 to 1023, 0 to 31) of BIT;
    SIGNAL mem_inst : mem_cell;
BEGIN
    o(0 to 7) <= mem_inst(0 to 1, 0 to 3);
END ex1;

            

However, you can specify a slice only for an object that has a one-dimensional array type.

ACTION: Replace the slice with an enumeration of the array values you want to specify. For example:

ARCHITECTURE ex1 OF example IS
    TYPE mem_cell IS ARRAY (0 to 1023, 0 to 31) of BIT;
    SIGNAL mem_inst : mem_cell;
BEGIN
    o(0) <= mem_inst(0,0);
    o(1) <= mem_inst(0,1);
    o(2) <= mem_inst(0,2);
    o(3) <= mem_inst(0,3);
    o(4) <= mem_inst(1,0);
    o(5) <= mem_inst(1,1);
    o(6) <= mem_inst(1,2);
    o(7) <= mem_inst(1,3);
END ex1;