ID:13382 Verilog HDL Expression error at <location>: invalid part select of unpacked array "<name>"

CAUSE: In a Verilog Design File (.v) at the specified location, you attempted to refer to more than one element of an unpacked array using a part select. Verilog HDL does not allow you to refer to an unpacked array in part or in whole. Instead, you must access elements of the array individually.

ACTION: Fully index the unpacked array or process the Verilog Design File with SystemVerilog extensions, which include support for slicing unpacked arrays.