ID:13110 PLL reference clock is constrained to an IO bank outside the bank(s) used by EMIF/PHYLite system(s)

CAUSE: PLL reference clock must be constrained to an IO bank which is used by the EMIF/PHYLite systems.

ACTION: Remove the offending assignments, or constrain the reference clock to one of the banks used by the EMIF/PHYLite systems.