ID:15361 DSP block input shift register starting with <name> of <name> must use same clock and clock enable signals

CAUSE: The DSP block input shift register starting with the specified node contains registers that use different clock or clock enable signals. The registers in the input shift register must use the same clock and clock enable signals.

ACTION: Modify the configuration of the input shift register so that all registers use the same clock and clock enable signals or modify the input shift register to use logic cells outside the DSP block.