ID:16257 Logic verification failed for strictly preserved region <name> bits. <name>

CAUSE: You attempted to compile a design that contains a strictly preserved region in design modification mode. The region logic settings do not the match reference logic settings from the design creation compilation for the region mask.

ACTION: Confirm that indicated region is a subject of design modification compilation by checking the Quartus Prime report. Ensure that the strict preservation location specified in the Quartus Prime INI file contains a valid reference region mask for the strictly preserved region and try to compile your design again. The reference mask should be generated in the latest design creation compilation for the region using the same Quartus Prime revision. If error is still reported, contact Intel for assistance.