CLK-30002: Clock Source Driving Non-Clock Pins

The clock signal sources in a design should drive only input clock ports of registers. When a design contains clock signal sources that connect to ports other than clock ports, the Compiler considers the design asynchronous, with associated issues and challenges of asynchronous designs.


The purpose of this generic rule is to identify clocking issues that more specific clock rules do not identify, such as multiplexed clocks, clock dividers that are not based on synchronous counters or state-machines, or D-latches based on the asynchronous load feature. Correct this connectivity unless intentional.




Analysis and Elaboration

Device Family

  • Intel® Cyclone® 10 GX
  • Intel® Arria® 10