ID:204024 Created port "<port_name>" on instance "<instance_name>" of hierarchy entity "<entity_name>" in the EDA formal verification netlist to connect extra signals crossing the hierarchy boundary

CAUSE: Buffers or a CLKCTRL WYSIWYG primitive were inserted which create extra signals which cross the hierarchical boundary of the black box. The EDA Netlist Writer groups those signals into the specified port.

ACTION: Verify the affected part of the design manually using an EDA formal verification tool.