ID:16743 Verilog HDL warning at <location>: empty port in <string> declaration
CAUSE: You used an empty port in your module declaration.
ACTION: No action is required. To remove the warning, use a non-empty port in your module declaration.
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CAUSE: You used an empty port in your module declaration.
ACTION: No action is required. To remove the warning, use a non-empty port in your module declaration.