ID:13471 Verilog HDL warning at <location>: value assigned to input "<name>"
CAUSE: In a Verilog Design File (.v) at the specified location, you assigned a value to the specified input.
ACTION: No action is required.
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CAUSE: In a Verilog Design File (.v) at the specified location, you assigned a value to the specified input.
ACTION: No action is required.