ID:17419 Verilog HDL warning at <location>: <string> <string> having generic interface port(s) (<string>) cannot be elaborated by itself

CAUSE: Quartus Prime Integrated Synthesis generated the specified warning message for the specified location in a Design File.

ACTION: No action is required. To remove the warning, address the issue identified by the message text. A future version of the Quartus Prime software will provide more extensive Help for this warning message.