ID:13029 Converted the fanout from the always-disabled tri-state buffer "<name>" to the node "<name>" to VCC

CAUSE: The output of an always-disabled tri-state buffer is Z, but the specified buffer feeds logic or an open-drain buffer. The Quartus Prime software converted the specified buffer to VCC as a don't care minimization. For example, this situation occurs in the following design:

	module test2 (input data, output out); 
	wire tribuf, gnd; 
	assign gnd = 1'b0; 
	assign tribuf = gnd ? data : 1'bz; 
	OPNDRN my_opndrn(tribuf, out); 
	endmodule 

               

Here, the always-disabled tri-state buffer tribuf is feeding an open-drain buffer, and hence is converted into VCC.