ID:13050 Open-drain buffer(s) that do not directly drive top-level pin(s) are removed

CAUSE: The design contains one or more open-drain buffers that do not directly drive top-level pins. The Quartus Prime software removes this open-drain buffer because the chip does not support internal tri-states. For example, the following Verilog design gives this warning message:

	module test1 (input data, oe, output out, inout bidir); 
	wire triwire, gnd; 
	assign gnd = 1'b0; 
	assign triwire = oe ? gnd : 1'bz; 
	and(out, triwire, data); 
	assign bidir = triwire; 
	endmodule 

               

In this design, the open-drain buffer triwire feeds an AND gate in addition to feeding the pin bidir. As a result, the Quartus Prime software converts its fan-out to the AND gate to a wire, and gives this warning. Note that an inversion is also considered an internal fan-out. As a result, the Quartus Prime software converts an open-drain buffer invertedly feeding a pin to a wire. Additionally, if an open-drain buffer feeds another open-drain buffer, the Quartus Prime software converts the first open-drain buffer to a wire. See the sub-messages below to view a list of the affected nodes.