ID:13051 Converted the fanout from the open-drain buffer "<name>" to the node "<name>" into a wire

CAUSE: The specified open-drain buffer feeds internal logic in addition to feeding tri-state logic. The Quartus Prime software converted the non-tri-state fanouts of this open-drain buffer to a wire because the chip does not support internal tri-states. For example, the following Verilog design gives this warning message:

	module test1 (input data, oe, output out, inout bidir); 
	wire triwire, gnd; 
	assign gnd = 1'b0; 
	assign triwire = oe ? gnd : 1'bz; 
	and(out, triwire, data); 
	assign bidir = triwire; 
	endmodule 

               

In the design, the open-drain buffer triwire feeds an AND gate in addition to feeding the pin bidir. As a result, the Quartus Prime software converts its fanout to the AND gate to a wire, and gives this warning. Note that an inversion is also an internal fanout. If an open-drain buffer feeds a pin through an inversion, the Quartus Prime software will convert the open-drain buffer into a wire. Additionally, if an open-drain buffer feeds another open-drain buffer, the Quartus Prime software will convert the first open-drain buffer to a wire.