ID:18234 ATX PLLs <name> and <name> are <number> ATX PLLs apart. For ATX PLL VCO frequencies between <name> and <name>, when two ATX PLLs operate at the same VCO frequency (within 100 MHz), they must be placed <number> ATX PLLs apart.

CAUSE: For ATX PLL VCO frequencies between 7.2 GHz and 11.4 GHz, when two ATX PLLs operate at the same VCO frequency (within 100 MHz), they must be placed 7 ATX PLLs apart (skip 6 intervening ATX PLLs). For ATX PLL VCO frequencies between 11.4 GHz and 14.4 GHz, when two ATX PLLs operate at the same VCO frequency (within 100 MHz), they must be placed 4 ATX PLLs apart (skip 3 intervening ATX PLLs). Intel recommends that you do not place these two ATX PLLs at their current locations. The distance between the two ATX PLLs is too small to meet the spacing requirements.

ACTION: Modify the location constraints for these two ATX PLLs in the Assignment Editor.