ID:178012 Core clock source from <name> node <name> does not have the same 0ppm source with respect to the PCS internal clock because <text>.

CAUSE: Core clock source does not have the same 0ppm source with respect to the physical coding sublayer (PCS) internal clock.

ACTION: Ensure that the core clock source has the same 0ppm source with respect to the PCS internal clock. For more information, refer to the Stratix V Device Handbook.