ID:19029 HPS DDR pll_ref_clk pin is placed in a location not supported by HPS Early IO release. If you plan to use Early IO release, place the pll_ref_clk in the IO bank 2K. In some circumstances you can place it in IO bank 2J..

CAUSE: The early IO release only enables specific backs, and if the pll_ref_clk is not in a proper location, it will not work.

ACTION: Refer to the Arria10 HPS EMIF placement documentation.