ID:176076 Can't merge fast PLL <name> and fast PLL <name> -- fast PLLs contain <number> unique LVDS counters driving SCLKs, but only <number> LVDS counters driving SCLKs are available on single fast PLL

CAUSE: The Fitter tried to merge the specified fast PLLs that contain the specified number of unique LVDS counters driving SCLK ports. However, the Fitter cannot merge the fast PLLs because only the specified number of LVDS counters driving SCLK ports are available in a single fast PLL. LVDS counters are defined as PLL taps which can drive SCLK ports.

ACTION: Modify the design so that the fast PLLs contain the same number of LVDS counters driving SCLK ports.