ID:15894 PLL "<name>" uses the auto-switchover feature, but the input clock frequencies are too far apart

CAUSE: The input clock frequencies specified for the specified PLL are too far apart for auto-switchover feature to work properly. The frequency difference between the two input clocks should be within 20% to guarantee that the PLL can detect a clock loss and switch over to the other input clock.

ACTION: Modify the design to make sure that the input clock frequencies of the specified PLL are within 20% of each other.