ID:15563 Enhanced PLL "<name>" has <name> port with duty cycle value <number> -- for the lock filter to function correctly, the duty cycle value must be more than 40% or less than 60%

CAUSE: The specified extclk port of the specified enhanced PLL has the specified duty cycle value. However, for the lock filter to function correctly, the duty cycle value must be more than 40% or less than 60% because you specified the clock in the FEEDBACK_SOURCE parameter. This condition may occur if you instantiate an extclk port directly in a text file rather than using the MegaWizard Plug-In Manager .

ACTION: Locate the source of the message to determine which extclk port is causing the warning. Change the duty clock cycle value to more than 40% and less than 60% for the specified extclk port or remove the FEEDBACK_SOURCE parameter so it does not specify the clock for that duty cycle. To avoid receiving this message in the future, Intel recommends using the MegaWizard Plug-In Manager.