ID:39054 Generated Verilog File <name>
CAUSE: You ran quartus_cdb with the --write_verilog_file option to generate the specified Verilog Design File (.v). As a result, quartus_cdb generated the file.
ACTION: No action is required.
| List of Messages | Parent topic: List of Messages |
CAUSE: You ran quartus_cdb with the --write_verilog_file option to generate the specified Verilog Design File (.v). As a result, quartus_cdb generated the file.
ACTION: No action is required.