ID:11942 Module instance "<prim_inst>", which is a <prim_wys_type> primitive and belongs to an ALTLVDS interface and is driven by a clock pin, should not have the <loaden_port> port connected

CAUSE: The loaden input port of either the serialization/deserialization (SERDES) DPA or the LVDS clock tree driving an ALTLVDS interface that uses a clock pin, is connected.

ACTION: Leave this port unconnected when driving the interface directly with a clock pin. This will be ensured during ALTLVDS megafunction generation.