ID:18797 Use the context menu (right click) on the previous error message to locate the DSP block locations contained in Logic Lock region "<name>" in Chip Planner.

CAUSE: Your design contains DSP nodes blocks which cannot all be placed because of too strict constraints.

ACTION: In the Quartus GUI, use the context menu (right click) on the previous error message, and select the Locate Node in > Chip Planner option to view the DSP locations that are permitted.