ID:10548 VHDL Subprogram Declaration error at <location>: mode for formal parameter cannot be <name>

CAUSE: In a Subprogram Declaration at the specified location in a VHDL Design File (.vhd), you used the specified mode for a formal parameter. However, the formal parameter must have a mode of IN, INOUT, or OUT.

ACTION: Change the mode of the formal parameter to IN, INOUT, or OUT.