ID:10487 VHDL aggregate error at <location>: aggregate for array type or record type object must cover all elements of object

CAUSE: In a VHDL Design File (.vhd) at the specified location, you used an aggregate for an array type or record type object. However, the aggregate does not cover all the elements of the object. For example, in the Signal Assignment Statement in the following code, the aggregate (ex1 => 2, ex3 => 5) does not cover the element ex2.

TYPE example IS
   RECORD
      ex1 : INTEGER range 1 to 5;
      ex2 : INTEGER range 1 to 6;
      ex3 : INTEGER range 1 to 7;
   END example;
SIGNAL exa : example;
 
               
exa <= (ex1 => 2, ex3 => 5);

The aggregate for an array type or record type object must cover all the elements of the object.

ACTION: Add the missing elements to the aggregate, or use the OTHERS choice to cover all possible values that are not included in the aggregate. In the previous example, you can use one of the following aggregates:

(ex1 => 2, ex2 | ex3 => 5);
(ex1 => 2, ex3 | OTHERS => 5);
(ex1 => 2, OTHERS => 5);