ID:10070 Verilog HDL unsupported feature error at <location>: event triggers are not supported for synthesis

CAUSE: In a Verilog Design File (.v) at the specified location, you triggered an event. Quartus Prime Integrated Synthesis does not support event triggers, and it cannot safely ignore event triggers without possibly changing the synthesized functionality of your design.

ACTION: Remove the event trigger from your design. If doing so changes the behavior of your design, express the functionality of the event trigger using synthesizable constructs.