ID:14715 Verilog error at <location>: can't resolve driver for variable or net in connection to port <text> on instance "<name>" because the instance has no module binding

CAUSE: The Quartus Prime software could not process a port connection expression that contains references to variables with default values or nets with a resolved net type, such as wor, wor, and tri1. Without the module definition, the compiler cannot determine whether the variable or net has a driver.

ACTION: The module definition cannot be found through automatic discovery. Instead, you must add the module definition to the current revision manually. Alternatively, you can use an external module declaration, which will be required if you are instantiating a design entity written in a different language such as VHDL.