ID:10940 SystemVerilog Enumeration Type Declaration error at <location>: enum range must contain only positive integral numbers

CAUSE: In an enumeration data type declaration at the specified location in a SystemVerilog Design File (.sv), you declared an enumeration element range that contains at least one expression that is not a positive integral number. The values in an enumeration element range must be positive integral numbers such as 8 and 2'd8.

ACTION: Modify the range so that it contains only positive integral numbers.